{"id":908,"date":"2022-09-29T01:05:52","date_gmt":"2022-09-29T08:05:52","guid":{"rendered":"https:\/\/www.verilogpro.com\/?page_id=908"},"modified":"2022-09-29T01:05:54","modified_gmt":"2022-09-29T08:05:54","slug":"design-category-posts","status":"publish","type":"page","link":"https:\/\/www.verilogpro.com\/design-category-posts\/","title":{"rendered":"Design Category Posts"},"content":{"rendered":"\n<p>A listing of posts under the Design category.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Design<\/h2>\n\n\n<ul class=\"display-posts-listing\"><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/verilog-module-for-design-and-testbench\/\">Verilog Module for Design and Testbench<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/verilog-always-block\/\">Verilog Always Block for RTL Modeling<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/verilog-generate-configurable-rtl\/\">Verilog Generate Configurable RTL Designs<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/systemverilog-structures-unions-design\/\">SystemVerilog Struct and Union &#8211; for Designers too<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/clock-domain-crossing-design-part-3\/\">Clock Domain Crossing Design &#8211; Part 3<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/clock-domain-crossing-part-2\/\">Clock Domain Crossing Design &#8211; Part 2<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/clock-domain-crossing-part-1\/\">Clock Domain Crossing Design &#8211; 3 Part Series<\/a><\/li><li class=\"listing-item\"><a class=\"title\" href=\"https:\/\/www.verilogpro.com\/asynchronous-fifo-design\/\">Dual-Clock Asynchronous FIFO in SystemVerilog<\/a><\/li><\/ul>\n","protected":false},"excerpt":{"rendered":"<p>A listing of posts under the Design category. Design<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_monsterinsights_skip_tracking":false,"_monsterinsights_sitenote_active":false,"_monsterinsights_sitenote_note":"","_monsterinsights_sitenote_category":0,"jetpack_post_was_ever_published":false,"footnotes":""},"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v22.6 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Design Category Posts - Verilog Pro<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.verilogpro.com\/design-category-posts\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Design Category Posts - Verilog Pro\" \/>\n<meta property=\"og:description\" content=\"A listing of posts under the Design category. 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