Comments on: SystemVerilog Struct and Union – for Designers too https://www.verilogpro.com/systemverilog-structures-unions-design/ Verilog and Systemverilog Resources for Design and Verification Thu, 29 Sep 2022 07:58:51 +0000 hourly 1 https://wordpress.org/?v=6.4.4 By: Jason Yu https://www.verilogpro.com/systemverilog-structures-unions-design/#comment-7832 Thu, 29 Sep 2022 07:58:51 +0000 http://www.verilogpro.com/?p=455#comment-7832 In reply to craig.

Ah yes, missed the slashes before the comments. Thanks!

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By: craig https://www.verilogpro.com/systemverilog-structures-unions-design/#comment-7830 Wed, 28 Sep 2022 18:21:25 +0000 http://www.verilogpro.com/?p=455#comment-7830 Hi Jason,

I noticed another typo in your second code example:
my_opcode_struct_t opcode_s; “fields view” to the struct
Should be:
my_opcode_struct_t opcode_s; // “fields view” to the struct

Keep the helpful articles coming.

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By: Jason Yu https://www.verilogpro.com/systemverilog-structures-unions-design/#comment-323 Thu, 16 Feb 2017 15:42:59 +0000 http://www.verilogpro.com/?p=455#comment-323 In reply to Jonas.

Thanks Jonas for noticing the typo! You’re completely correct, I’ve fixed the code snippet above. The same code is correct in the download for this post (I did compile and test that one).

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By: Jonas https://www.verilogpro.com/systemverilog-structures-unions-design/#comment-321 Thu, 16 Feb 2017 11:55:56 +0000 http://www.verilogpro.com/?p=455#comment-321 Love your posts!

I think you got something wrong in the first code example:
Structs should have each element separated by semicolons, not commas.

i.e.
typedef struct packed
{
my_opcode_t opcode; // 16-bit opcode, enumerated type
my_dest_t dest; // 16-bit destination, enumerated type
logic [15:0] opA;
logic [15:0] opB;
} my_opcode_struct_t;

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